End-to-end jitter reduction in egress queues over ports on hierarchical queuing MICs and MPCs by lowering the maximum queues enabled on the line card

Hierarchical CoS features are available for interfaces hosted on MICs in MPC1 Q, MPC2 Q, and MPC2 EQ line cards in MX240, MX480, MX960, MX2010, and MX2020 routers and for interfaces hosted on 2-port or 4-port 10-Gigabit Ethernet MICs in MX5, MX10, MX40, or MX80 modular chassis routers. For interfaces configured on these hierarchical queuing MICs and MPCs, you can reduce the variation in packet delay in the hierarchical queues if you decrease the maximum number of hierarchical queues supported by the underlying line card.