Micro-SIDs in TI-LFA, microloop avoidance, flex algo, and IS-IS MT

We extend the support of compressing SRv6 addresses into a single IPv6 address (micro-SID) in topology-independent loop-free alternate (TI-LFA), microloop avoidance, and Flexible Algorithm (flex algo) path computations. From this release onward, you can also configure algorithms for micro-segment identifiers (micro-SIDs) to facilitate the new extended feature. We also support IPv6 unicast topology (part of IS-IS MT) in TI-LFA, microloop avoidance, and flex algo computations. To enable flex algo to install the ingress routes in transport class routing information bases (RIBs), configure the use-transport-class statement at the [edit routing-options flex-algorithm id ] hierarchy level.